Multiple line access to digital telecommunications equipment necessitates its organization into groupings of similar circuit packs, for example into shelves of receivers and transmitters. Typically, clock signals needed by the individual transmitters are provided by a single transmitter designated as a master, with respect to clocking, and the remaining transmitters being slaved from the master. Each transmitter also typically has a local clock circuit comprising for example, a voltage-controlled crystal oscillator (VCXO). The master transmitter could either phase-lock to a standard clock signal or use its internal VCXO. Transition between the reference clock signal and the internal VCXO is typically achieved using a clamping circuit which clamps the VCXO to a preset reference voltage representing a desired free-running frequency for the VCXO. An individual circuit pack may be able to tolerate the phase shift introduced by the clamping action, however when several circuit packs are slaved to a master circuit pack for clocking, rapid phase shifts may cause problems. It is desirable to limit the rate at which the master circuit pack changes its frequency.